pit_driver_optinBoard.h

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00001 #ifndef PIT_DRIVER_OPTINBOARD_H
00002 #define PIT_DRIVER_OPTINBOARD_H
00003 
00004 #include "pit_def.h"
00005 #include "pit_comm.h"
00006 #include <log4cpp/BasicConfigurator.hh>
00007 #include <log4cpp/Category.hh>
00008 
00009 
00010 #include "pit_driver_opticalLink.h"
00011 
00012 using namespace std;
00013 
00014 // 0x2000000 is the proper optin memory space base address
00015 #define OPTIN_BOARDS_BASE_ADDRESS   0x2000000 
00016 // for debugging I am setting the optin boards base address in the sram memory position 
00017 //#define OPTIN_BOARDS_BASE_ADDRESS   0x1800000
00018 // One OPTIN is plugged in position 0x3000000
00019 //#define OPTIN_BOARDS_BASE_ADDRESS 0x3000000
00020 
00021 // The old offset would also leaves us outside the memory space
00022 //#define OPTIN_BOARDS_OFFSET           0x0001000
00023 // following 0x1000000 is the default offset
00024 #define OPTIN_BOARDS_OFFSET         0x1000000
00025 // put OFFSET to 0, so that actually ALL pit_driver_optinBoard objects access the same OPTIN
00026 //#define OPTIN_BOARDS_OFFSET         0x0000000
00027 
00028 
00029 //****************************************************
00030 // Offsets of optin board registers
00031 #define OPTIN_BOARDS_FWVERSION_OFFSET           0x0  
00032 #define OPTIN_BOARDS_STATUS_OFFSET                      0x1  
00033 #define OPTIN_BOARDS_COMMAND_OFFSET                     0x2  
00034 #define OPTIN_BOARDS_SETTING_OFFSET                     0x3  
00035 #define OPTIN_BOARDS_TIMESTAMP_OFFSET           0x51 
00036 #define OPTIN_BOARDS_MINFOCOUNTS_OFFSET         0x60 
00037 
00038 class pit_driver_opticalLink;
00039 
00040 
00042 class pit_driver_optinBoard
00043 {         
00045 
00048 unsigned int boardNumber; 
00049         
00051 
00055 UInt28 baseAddress;   
00056 
00058 
00063 pit_comm *commFEE;      
00064         
00065                 
00067 log4cpp::Category *logDriverOptin;
00068 
00070 
00073 pit_driver_opticalLink *opticalLink[NUMBER_OPTICAL_LINKS];
00074   
00076 
00078 bool boardPlugged; 
00079         
00081 int fpgaVersion; // fpga firmware version number 
00082         
00083         
00084         // Private member functions
00085         
00087 void checkBoardPlugged(void); 
00088 
00090 
00096 UInt32 readOptinStatus(void);
00097 
00098 
00100 void refreshStatusServices(void);
00101 
00102 
00104 
00109 UInt32 readOptinSetting(void);
00110 
00112 
00117 UInt32 writeOptinSetting(UInt32 p_optinSetting) ;
00118 
00119 
00120 
00122 UInt32 writeOptinCommand(UInt32 p_optinCommand);
00123 
00124 
00125 // *****************  PUBLIC interface
00126 public:                         
00127                                 
00129 
00133 pit_driver_optinBoard(unsigned int boardNumber, pit_comm *commFEE);
00134         
00136 ~pit_driver_optinBoard(void);
00137     
00138         
00140 inline unsigned int getBoardNumber() const { return boardNumber; }  
00141 
00143 inline UInt28 getBaseAddress() const { return baseAddress; }
00144 
00146 pit_driver_opticalLink& getOpticalLink(unsigned int linkNum);
00147 
00148 
00150 inline bool IsBoardPlugged(void) const { return boardPlugged; } 
00151 
00153 UInt12 refreshLinkStatus(void);
00154 
00155 
00157 unsigned int getOptinFirmwareVersion();
00158         
00160 unsigned int readOptinFirmwareVersion();
00161 
00163 
00168 UInt32 refreshOptinStatus(void);
00169 
00170 
00172 
00173 UInt32  refreshOptinSetting(void); 
00174 
00176 
00181 UInt32 readTimeStamp(int p_timeStampNumber);
00182   
00184 
00190 int readMinFastorCounts(int layer, int chip);
00191         
00193 
00200 int writeMinFastorCounts(int layer, int chip, unsigned int minCounts);
00201         
00203 
00209 int readMaxFastorCounts(int layer, int chip);
00210         
00212 
00219 int writeMaxFastorCounts(int layer, int chip, unsigned int maxCounts) ;
00220 int refresh();
00221   
00222   
00223 
00224 };
00225 
00226 #endif

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