00001 #ifndef PIT_DRIVER_PROCFPGA_H 00002 #define PIT_DRIVER_PROCFPGA_H 00003 00004 #include "pit_def.h" 00005 #include "pit_comm.h" 00006 #include <log4cpp/BasicConfigurator.hh> 00007 #include <log4cpp/Category.hh> 00008 00009 00010 #define PROC_FPGA_BASE_ADRESS 0x1000000 00011 00012 #define PROC_FPGA_CMD_REG_OFFSET 0x1 00013 #define PROC_FPGA_STATUS_OFFSET 0x2 00014 #define PROC_FPGA_SETTING_OFFSET 0xc 00015 #define PROC_FPGA_TIMER_ENABLE_OFFSET 0x16 00016 #define PROC_FPGA_STROBER_EN_OFFSET 0x17 00017 #define PROC_FPGA_OUTPUT_CONF_OFFSET 0X18 00018 #define PROC_FPGA_OUTPUT_MODE_OFFSET 0x19 00019 #define PROC_FPGA_SIGNATURE_OFFSET 0x1a 00020 #define PROC_FPGA_RANDOM_PERIOD_OFFSET 0x24 00021 #define PROC_FPGA_COUNTER_OUTPUT_OFFSET 0x2f 00022 #define PROC_FPGA_MIN_COUNTER_OFFSET 0x39 00023 #define PROC_FPGA_MAX_COUNTER_OFFSET 0x43 00024 #define PROC_FPGA_TIME_STAMP_OFFSET 0x4d 00025 00026 #define PROC_FPGA_TIME_STAMP_REG_NUMBER 3 00027 00028 #define PROC_FPGA_GEN_COUNTER_SETTINGS_OFFSET 0x83 00029 #define PROC_FPGA_GEN_COUNTER_OFFSET 0x84 00030 #define PROC_FPGA_COUNTER_GROUP_OFFSET 0x88 00031 00032 #define PROC_FPGA_COUNTER_GROUP_REGISTERS 12 00033 00034 #define PROC_FPGA_CMD_START_COUNTER 0x80000001 00035 #define PROC_FPGA_CMD_STOP_COUNTER 0x80000000 00036 00037 #define PROC_FPGA_ADDRESS_SPACE 0xff 00038 #define PROC_FPGA_N_GEN_COUNTERS 12 00039 00040 enum pit_trigger_mode{ 00041 Trigger_Normal=0, 00042 Trigger_Toggle, 00043 Trigger_Signature, 00044 Trigger_Random 00045 }; 00046 00047 using namespace std; 00048 00049 00051 class pit_driver_procFpga 00052 { 00053 private: 00054 00056 00058 pit_comm *commFEE; 00059 00060 00062 log4cpp::Category *logProcFpga; 00063 00065 00067 UInt32 readReg(UInt28 offset); 00068 00070 00072 void writeReg(UInt28 offset , UInt32 value); 00073 public: 00074 00075 00077 00079 pit_driver_procFpga( pit_comm *commFEE); 00080 00082 ~pit_driver_procFpga(void); 00083 00085 00086 void writeCmdReg(UInt32 value){ writeReg( PROC_FPGA_CMD_REG_OFFSET , value);} 00087 00089 00090 UInt32 readCmdReg(){return readReg( PROC_FPGA_CMD_REG_OFFSET);} 00091 00092 00094 void startCounter(){writeCmdReg(PROC_FPGA_CMD_START_COUNTER);} 00095 00097 void stopCounter(){writeCmdReg(PROC_FPGA_CMD_STOP_COUNTER);} 00098 00100 00101 UInt32 readStatusRegister(unsigned int regNumber); 00102 00104 00106 void writeSettingRegister(unsigned int regNumber, UInt32 value); 00107 00109 00111 UInt32 readSettingRegister(unsigned int regNumber); 00112 00114 00115 void setTimerEnable(bool value); 00116 00118 00119 bool isTimerEnabled(); 00120 00122 00123 UInt32 readTimerPeriod(){return readReg(PROC_FPGA_TIMER_ENABLE_OFFSET) & 0x3fffffff ; } 00124 00126 00127 void writeTimerPeriod(UInt32 period); 00128 00129 00131 00133 void writeSignature(unsigned int signature, UInt32 value); 00134 00136 00138 UInt32 readSignature(unsigned int signature); 00139 00141 00143 void writeRandomPeriod(unsigned int period, UInt32 value); 00144 00146 00148 UInt32 readRandomPeriod(unsigned int period); 00149 00150 00152 00154 UInt32 readCounter(unsigned int counter); 00155 00157 00159 void writeCounter(unsigned int counter, UInt32 value); 00161 00163 void writeMinCounter(unsigned int counter, UInt32 value); 00165 00167 UInt32 readMinCountert(unsigned int counter); 00169 00171 void writeMaxCounter(unsigned int counter, UInt32 value); 00173 00175 UInt32 readMaxCounter(unsigned int counter); 00176 00177 00179 00182 UInt32 readTimeStamp(unsigned int channel, unsigned int timeStamp ); 00183 00185 00188 UInt32 readCounterInGroup(unsigned int group, unsigned int counter ); 00189 00191 00193 void writeTriggerMode(unsigned int output, pit_trigger_mode mode); 00195 00197 void writeTriggerMode(unsigned int output,const string &mode); 00198 00200 00202 pit_trigger_mode readTriggerMode(unsigned int output); 00203 00205 00207 string readStrTriggerMode(unsigned int output); 00208 00209 }; 00210 00211 #endif